22nm-node logic lithography at the boundary of the resolution limit

Ryoung-han Kim, Steven Holmes, Scott Halle, Vito Dai,

Jason Meiring, Aasutosh Dave, Matthew E. Colburn, and

Harry J. Levinson

Extension of single patterning for next-generation transistor technology

requires strong off-axis illumination, design for manufacturability,

and layer-specific lithography

The resolution of an optical-imaging system is governed by

Rayleigh’s law,

printable pitch,

P=2 D k1 =NA, where P is the minimum is the wavelength of the illuminating light,

NA

of the lithographic process. Historically, the semiconductor

industry has been scaling down the minimum printable pitch

for cost reduction and higher chip density by reducing is the system’s numerical aperture, and k1 indicates the difficulty /NA.